This work presents a mixed-mode de-embedding methodology designed to improve the accuracy of on-wafer S-parameter measurements in advanced FinFET technologies. The approach modifies the conventional Open-Short technique by physically implementing only the layout-robust portions of the Short structure, while the dominant Source impedance is obtained through dedicated EM simulations and removed analytically. This strategy avoids inaccuracies introduced by the non-ideal shorting paths imposed by 16−nm metal routing rules and multi-layer interconnect constraints. Experimental results from 1 to 125 GHz demonstrate that correcting the Source parasitic impedance using EM simulations instead of relying only on physical short significantly improves the physical consistency of the measured S-parameters across the entire frequency range, confirming the effectiveness of the proposed methodology for broadband device characterization in deeply scaled nodes.
Esposito, C., D'Aniello, F., Bosi, G., Stevenazzi, L., Baschirotto, A., Vadalà, V. (2026). EM-Assisted Open-Short De-Embedding Technique for 16-nm FinFET Technology. In 2026 107th ARFTG Microwave Measurement Conference (ARFTG) (pp.1-4) [10.1109/arftg68740.2026.11614607].
EM-Assisted Open-Short De-Embedding Technique for 16-nm FinFET Technology
Esposito, Ciro;D'Aniello, Federico;Bosi, Gianni;Stevenazzi, Lorenzo;Baschirotto, Andrea;Vadalà, Valeria
2026
Abstract
This work presents a mixed-mode de-embedding methodology designed to improve the accuracy of on-wafer S-parameter measurements in advanced FinFET technologies. The approach modifies the conventional Open-Short technique by physically implementing only the layout-robust portions of the Short structure, while the dominant Source impedance is obtained through dedicated EM simulations and removed analytically. This strategy avoids inaccuracies introduced by the non-ideal shorting paths imposed by 16−nm metal routing rules and multi-layer interconnect constraints. Experimental results from 1 to 125 GHz demonstrate that correcting the Source parasitic impedance using EM simulations instead of relying only on physical short significantly improves the physical consistency of the measured S-parameters across the entire frequency range, confirming the effectiveness of the proposed methodology for broadband device characterization in deeply scaled nodes.| File | Dimensione | Formato | |
|---|---|---|---|
|
Esposito et al-2026-ARFTG-IEEE-VoR.pdf
Solo gestori archivio
Tipologia di allegato:
Publisher’s Version (Version of Record, VoR)
Licenza:
Tutti i diritti riservati
Dimensione
500.26 kB
Formato
Adobe PDF
|
500.26 kB | Adobe PDF | Visualizza/Apri Richiedi una copia |
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.


