Future progress in Silicon (Si) micro- and nanoelectronics depends on further miniaturization ("More Moore") and/or diversification ("More than Moore") of existing Si CMOS - based technologies. In both cases, the integration of alternative semiconductors (i.e. Ge, III-V & II-VI) into the Si mainstream technology platform presents an important approach, simply because the optoelectronic properties of alternative semiconductors promise to outperform those of Si. However, lattice and thermal mismatch with respect to Si(001) limit achievable optoelectronic properties of heteroepitaxial micro- and nanostructures due to structural defects and chemical impurities. In consequence, advanced Si CMOS compatible heteroepitaxy concepts with precisely adjusted thermal growth and annealing budgets are of central importance. © 2014 IEEE
Montalenti, F., Salvalaglio, M., Marzegalli, A., Zaumseil, P., Capellini, G., Schülli, T., et al. (2014). Si CMOS compatible, compliant integration of lattice-mismatched semiconductors on Si(001): Example of fully coherent Ge/Si nanostructures. In 2014 7th International Silicon-Germanium Technology and Device Meeting, ISTDM 2014 (pp.149-150). IEEE Computer Society [10.1109/ISTDM.2014.6874624].
Si CMOS compatible, compliant integration of lattice-mismatched semiconductors on Si(001): Example of fully coherent Ge/Si nanostructures
MONTALENTI, FRANCESCO CIMBRO MATTIAPrimo
;SALVALAGLIO, MARCOSecondo
;MARZEGALLI, ANNA;
2014
Abstract
Future progress in Silicon (Si) micro- and nanoelectronics depends on further miniaturization ("More Moore") and/or diversification ("More than Moore") of existing Si CMOS - based technologies. In both cases, the integration of alternative semiconductors (i.e. Ge, III-V & II-VI) into the Si mainstream technology platform presents an important approach, simply because the optoelectronic properties of alternative semiconductors promise to outperform those of Si. However, lattice and thermal mismatch with respect to Si(001) limit achievable optoelectronic properties of heteroepitaxial micro- and nanostructures due to structural defects and chemical impurities. In consequence, advanced Si CMOS compatible heteroepitaxy concepts with precisely adjusted thermal growth and annealing budgets are of central importance. © 2014 IEEE
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