Electrical characterization of thin silicon-on-insulator films doped by means of phosphorus end-terminated polymers

Ex-situ doping of 30 nm thick silicon-on-insulator (SOI) substrates is performed by using polymers terminated with a doping containing moiety. Poly(methylmetachrylate) polymers with a P containing moiety are used to create a phosphorus δ-layer at the interface between the Si device layer and a 10 nm thick SiO2 capping layer deposited on the SOI sample by conventional e-beam evaporation. Drive-in of the P atoms is performed by annealing the samples in a rapid thermal processing (RTP) system at temperatures (TA) ranging from 900 to 1200 °C in N2 atmosphere. Annealing time is properly selected to inject a constant P dose of ∼ 1 × 1013 cm−2 into the SOI substrate, achieving a uniform dopant concentration throughout the entire Si device layer as verified by Time-of-Flight Secondary Ion Mass Spectroscopy (ToF-SIMS) measurements. Sample resistivity (ρ), carrier concentration (ne) and mobility (μ) are determined combining sheet resistance and Hall measurements in the van der Pauw configuration. An average activation rate above 95% is observed at room temperature in the samples annealed at 1000 °C for 100 s, suggesting complete activation of the injected dopants. The detection of phosphorus signal by EPR analysis confirms the extremely high effective concentration of dopants. Low temperature (5–300 K) electrical characterization of a 30 nm thick SOI sample (ne ∼ 2.7 × 1018 cm−3 at 300 K) indicates that the evolution of ρ, ne and μ values as a function of temperature are perfectly consistent, within the experimental error, with those reported for a P doped bulk Si.