The counting oy the consecutive ionization clusters in a drift chamber is a very promising technique for particle identification purposes. Up to noy the bottleneck for the application of this technique wat the possibility of realizing a large number of very-fast read-out channels with reduce power consumption. Typical time separation between each ionization act in a helium-based gas mixture is from a few ns to a few tens of ns. Thu. The read-out interface has to be able to process such a high-speed signals. In this paper. The first realization of a CMOS 0.13μm integrated readout circuit, including a fast variable gain amplifier (VGA) with 160MHz bandwidth is designed for the central tracker of a future collider (ILC, superB). The VGA circuit has been optimized for low power consumption. Moreover, it presents a programmable power consumption (8.4 mA, 9.4mA, 10.6mA) according to the gain setting (0dB, 10dB, 20dB). The design issues an. The measured performance associated to this architecture are discussed. © 2009 IEEE.

D’Amico, S., DE MATTEIS, M., Grancagnolo, F., Panareo, M., Perrino, R., Chiodini, G., et al. (2009). A 0.13µm CMOS VGA for Drift Chambers. In IEEE International Conference on Electronics, Circuits and Systems (ICECS '09) (pp.936-939) [10.1109/ICECS.2009.5410823].

A 0.13µm CMOS VGA for Drift Chambers

DE MATTEIS, MARCELLO;BASCHIROTTO, ANDREA
2009

Abstract

The counting oy the consecutive ionization clusters in a drift chamber is a very promising technique for particle identification purposes. Up to noy the bottleneck for the application of this technique wat the possibility of realizing a large number of very-fast read-out channels with reduce power consumption. Typical time separation between each ionization act in a helium-based gas mixture is from a few ns to a few tens of ns. Thu. The read-out interface has to be able to process such a high-speed signals. In this paper. The first realization of a CMOS 0.13μm integrated readout circuit, including a fast variable gain amplifier (VGA) with 160MHz bandwidth is designed for the central tracker of a future collider (ILC, superB). The VGA circuit has been optimized for low power consumption. Moreover, it presents a programmable power consumption (8.4 mA, 9.4mA, 10.6mA) according to the gain setting (0dB, 10dB, 20dB). The design issues an. The measured performance associated to this architecture are discussed. © 2009 IEEE.
paper
CMOS, VGA
English
2009 16th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2009
9781424450916
D’Amico, S., DE MATTEIS, M., Grancagnolo, F., Panareo, M., Perrino, R., Chiodini, G., et al. (2009). A 0.13µm CMOS VGA for Drift Chambers. In IEEE International Conference on Electronics, Circuits and Systems (ICECS '09) (pp.936-939) [10.1109/ICECS.2009.5410823].
D’Amico, S; DE MATTEIS, M; Grancagnolo, F; Panareo, M; Perrino, R; Chiodini, G; Corvaglia, A; Cocciolo, G; Baschirotto, A
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/8886
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