The CLARO is an ASIC for single photon counting with pixellated photomultipliers, designed to sustain a high counting rate at low power. It was primarily developed to readout multi-anode photomultipliers (Ma-PMTs) in the upgraded LHCb RICH detectors at the LHC. The first four-channel prototype, named CLARO-CMOS, was realized in a 0.35 μm CMOS technology, demonstrating the capability to count single photons at very high rates, up to 10 MHz, with a low power consumption of about 1 mW per channel. In this paper, the first tests of the single photon counting performance of the CLARO-CMOS coupled to a Hamamatsu R11265 multi-anode photomultiplier tube are presented. © 2013 IEEE.
Carniti, P., Cotta Ramusino, A., Gotti, C., Maino, M., Malaguti, R., Pessina, G. (2013). The CLARO ASIC: Design and performance of prototype integrated circuits for fast single photon counting at low power. In IEEE Nuclear Science Symposium Conference Record (pp.1-4). Institute of Electrical and Electronics Engineers Inc. [10.1109/NSSMIC.2013.6829768].
The CLARO ASIC: Design and performance of prototype integrated circuits for fast single photon counting at low power
CARNITI, PAOLO;GOTTI, CLAUDIO;MAINO, MATTEO;PESSINA, GIANLUIGI EZIO
2013
Abstract
The CLARO is an ASIC for single photon counting with pixellated photomultipliers, designed to sustain a high counting rate at low power. It was primarily developed to readout multi-anode photomultipliers (Ma-PMTs) in the upgraded LHCb RICH detectors at the LHC. The first four-channel prototype, named CLARO-CMOS, was realized in a 0.35 μm CMOS technology, demonstrating the capability to count single photons at very high rates, up to 10 MHz, with a low power consumption of about 1 mW per channel. In this paper, the first tests of the single photon counting performance of the CLARO-CMOS coupled to a Hamamatsu R11265 multi-anode photomultiplier tube are presented. © 2013 IEEE.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.