We present an InP-based membrane p-i-n photodetector on a silicon-on-insulator sample containing a Si-wiring photonic circuit that is suitable for use in optical interconnections on Si integrated circuits (ICs). The detector mesa footprint is 50 μm2, which is the smallest reported to date for this kind of device, and the junction capacitance is below 10 fF, which allows for high integration density and low dynamic power consumption. The measured detector responsivity and 3-dB bandwidth are 0.45 A/W and 33 GHz, respectively. The device fabrication is compatible with wafer-scale processing steps, guaranteeing compatibility toward future-generation electronic IC processing. © 2010 IEEE.
Binetti, P., Leijtens, X., De Vries, T., Oei, Y., Di Cioccio, L., Fedeli, J., et al. (2010). InP/InGaAs photodetector on SOI photonic circuitry. IEEE PHOTONICS JOURNAL, 2(3), 299-305 [10.1109/JPHOT.2010.2046151].
InP/InGaAs photodetector on SOI photonic circuitry
Notzel R.;
2010
Abstract
We present an InP-based membrane p-i-n photodetector on a silicon-on-insulator sample containing a Si-wiring photonic circuit that is suitable for use in optical interconnections on Si integrated circuits (ICs). The detector mesa footprint is 50 μm2, which is the smallest reported to date for this kind of device, and the junction capacitance is below 10 fF, which allows for high integration density and low dynamic power consumption. The measured detector responsivity and 3-dB bandwidth are 0.45 A/W and 33 GHz, respectively. The device fabrication is compatible with wafer-scale processing steps, guaranteeing compatibility toward future-generation electronic IC processing. © 2010 IEEE.
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