A re-configurable MASH ΣΔ ADC is implemented in 0.18μm CMOS process. The proposed technique configures the ADC architecture for optimal power for specific resolution and applications. For high performance applications, the first integrator stage of the cascaded modulator may be constructed from larger transistors and capacitors to reduce thermal and op amp noise. However, this larger first stage also consumes more power than later stages constructed from smaller transistors and capacitors. Thus the first stage tends to provide a higher resolution while consuming more power than later stages, which have lower performance and lower power consumption. The principal advantage of this architecture is that the ADC is adaptable for applications with different performance and power consumption requirements. Although the ADC was designed for audio applications, this re-configurability is also useful for multimode communication systems. © 2012 IEEE.

Wan, K., Wong, W., Chan, G., Wan, K., Yau, B., Wu, A., et al. (2012). A re-configurable 4th order switched capacitor ΣΔ ADC for adjusting power and performance. In Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on (pp.1-4) [10.1109/EDSSC.2012.6482789].

A re-configurable 4th order switched capacitor ΣΔ ADC for adjusting power and performance

BASCHIROTTO, ANDREA
2012

Abstract

A re-configurable MASH ΣΔ ADC is implemented in 0.18μm CMOS process. The proposed technique configures the ADC architecture for optimal power for specific resolution and applications. For high performance applications, the first integrator stage of the cascaded modulator may be constructed from larger transistors and capacitors to reduce thermal and op amp noise. However, this larger first stage also consumes more power than later stages constructed from smaller transistors and capacitors. Thus the first stage tends to provide a higher resolution while consuming more power than later stages, which have lower performance and lower power consumption. The principal advantage of this architecture is that the ADC is adaptable for applications with different performance and power consumption requirements. Although the ADC was designed for audio applications, this re-configurability is also useful for multimode communication systems. © 2012 IEEE.
paper
CMOS analogue integrated circuits;capacitors;modulators;operational amplifiers;power consumption;reconfigurable architectures;sigma-delta modulation;switched capacitor networks;thermal noise;transistor circuits;ADC architecture;CMOS process;audio applications;capacitors;cascaded modulator;integrator stage;multimode communication systems;op amp noise;optimal power;power consumption requirements;reconfigurable 4th order switched capacitor ΣΔ ADC;reconfigurable MASH ΣΔ ADC;thermal noise;transistors;Digital audio players;Distortion measurement;Passive optical networks
English
Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on
2012
Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on
978-1-4673-5696-1
2012
1
4
none
Wan, K., Wong, W., Chan, G., Wan, K., Yau, B., Wu, A., et al. (2012). A re-configurable 4th order switched capacitor ΣΔ ADC for adjusting power and performance. In Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on (pp.1-4) [10.1109/EDSSC.2012.6482789].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/48379
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