This paper presents an ultra-low power, area-efficient 4-channel front-end electronics for Monitored Drift Tubes (MDT) at Atlas Experiment. The proposed design is composed by low-noise Charge Sensitive Preamplffier (for charge-to-voltage conversion), a continuous-time Shaper/filter for Bipolar Time-Domain Pulses feeding a dynamic (no-clocked) Comparator (for voltage to time conversion). The system is designed to detect an input charge in the range of 5-100fC. The peaking time of Analog channel is 14.6 ns and exhibits a sensitivity of 8 mV/fC. The design has a single mode of operation, time-over-threshold (ToT). At the output the ToT encoding of input charge is provided in low-voltage differential signal, for connecting with TDC board, along with digital CMOS level signal. The design is operated from a single 1.2 V supply voltage. The chip is realized in 65 nm CMOS technology and has a total area occupancy of 4 mm2.

Shah, S., Kroha, H., De Matteis, M., Baschirotto, A., Richter, R. (2023). 65 nm CMOS 8 mV/fC, 14.6 ns Rising Time Analog Front-End for ATLAS Muon Drift Tubes Detectors. In 2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) (pp.97-100). IEEE [10.1109/prime58259.2023.10161741].

65 nm CMOS 8 mV/fC, 14.6 ns Rising Time Analog Front-End for ATLAS Muon Drift Tubes Detectors

Shah, SAA
;
De Matteis, M;Baschirotto, A;
2023

Abstract

This paper presents an ultra-low power, area-efficient 4-channel front-end electronics for Monitored Drift Tubes (MDT) at Atlas Experiment. The proposed design is composed by low-noise Charge Sensitive Preamplffier (for charge-to-voltage conversion), a continuous-time Shaper/filter for Bipolar Time-Domain Pulses feeding a dynamic (no-clocked) Comparator (for voltage to time conversion). The system is designed to detect an input charge in the range of 5-100fC. The peaking time of Analog channel is 14.6 ns and exhibits a sensitivity of 8 mV/fC. The design has a single mode of operation, time-over-threshold (ToT). At the output the ToT encoding of input charge is provided in low-voltage differential signal, for connecting with TDC board, along with digital CMOS level signal. The design is operated from a single 1.2 V supply voltage. The chip is realized in 65 nm CMOS technology and has a total area occupancy of 4 mm2.
paper
ATLAS; detector; monitored-drift-tubes;
English
18th International Conference on Ph.D Research in Microelectronics and Electronics, PRIME 2023 - 18-21 June 2023
2023
2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)
9798350303209
2023
97
100
none
Shah, S., Kroha, H., De Matteis, M., Baschirotto, A., Richter, R. (2023). 65 nm CMOS 8 mV/fC, 14.6 ns Rising Time Analog Front-End for ATLAS Muon Drift Tubes Detectors. In 2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) (pp.97-100). IEEE [10.1109/prime58259.2023.10161741].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/476739
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