SALT, a new dedicated readout Application Specific Integrated Circuit (ASIC) for the Upstream Tracker, a new silicon detector in the Large Hadron Collider beauty (LHCb) experiment, has been designed and developed. It is a 128-channel chip using an innovative architecture comprising a low-power analogue front-end with fast pulse shaping and a 40 MSps 6-bit Analog-to-Digital Converter (ADC) in each channel, followed by a Digital Signal Processing (DSP) block performing pedestal and Mean Common Mode (MCM) subtraction and zero suppression. The prototypes of SALT were fabricated and tested, confirming the full chip functionality and fulfilling the specifications. A signal-to-noise ratio of about 20 is achieved for a silicon sensor with a 12 pF input capacitance. In this paper, the SALT architecture and measurements of the chip performance are presented.

Beteta, C., Andreou, D., Artuso, M., Beiter, A., Blusk, S., Bugiel, R., et al. (2022). The SALT—readout ASIC for silicon strip sensors of upstream tracker in the upgraded LHCb experiment. SENSORS, 22(1) [10.3390/s22010107].

The SALT—readout ASIC for silicon strip sensors of upstream tracker in the upgraded LHCb experiment

Petruzzo M.;
2022

Abstract

SALT, a new dedicated readout Application Specific Integrated Circuit (ASIC) for the Upstream Tracker, a new silicon detector in the Large Hadron Collider beauty (LHCb) experiment, has been designed and developed. It is a 128-channel chip using an innovative architecture comprising a low-power analogue front-end with fast pulse shaping and a 40 MSps 6-bit Analog-to-Digital Converter (ADC) in each channel, followed by a Digital Signal Processing (DSP) block performing pedestal and Mean Common Mode (MCM) subtraction and zero suppression. The prototypes of SALT were fabricated and tested, confirming the full chip functionality and fulfilling the specifications. A signal-to-noise ratio of about 20 is achieved for a silicon sensor with a 12 pF input capacitance. In this paper, the SALT architecture and measurements of the chip performance are presented.
Articolo in rivista - Articolo scientifico
ADC; ASIC; DLL; DSP; Front-end; PLL; SEE;
English
24-dic-2021
2022
22
1
107
open
Beteta, C., Andreou, D., Artuso, M., Beiter, A., Blusk, S., Bugiel, R., et al. (2022). The SALT—readout ASIC for silicon strip sensors of upstream tracker in the upgraded LHCb experiment. SENSORS, 22(1) [10.3390/s22010107].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/420766
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