This paper presents a novel approach to design a digitally programmable low pass filter (LPF) and variable gain amplifier (VGA) intended for a software-defined radio (SDR) front-end. These flexible analog circuits are driven by a network-on-chip (NoC) that is able to set performance parameters like cut-off frequency, selectivity, noise, and gain guaranteeing at any time a near-optimal power/perfomance trade-off. A design approach is proposed to tackle the challenges imposed by flexibility in analog design. A silicon prototype is realized in 0.13-mu m CMOS technology with 1.2-V supply voltage to prove the validity of the proposed solution. The LPF provides a frequency tuning range between 0.35 MHz and 23.5 MHz with an adaptive integrated noise level between 85 mu Vrms and 163 mu Vrms whereby the power consumption conveniently varies from 0.72 mW to 21.6 mW according to the required performance. The VGA is made up of two cascaded gain stages and provides a gain range from about 0 dB to 39 dB with a reconfigurable power/bandwidth.

Giannini, V., Craninckx, J., D'Amico, S., & Baschirotto, A. (2007). Flexible Baseband Analog Circuits for Software-Defined Radio Front-Ends. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 42(7), 1501-1512 [10.1109/JSSC.2007.899103].

Flexible baseband analog circuits for software-defined radio front-ends

BASCHIROTTO, ANDREA
2007

Abstract

This paper presents a novel approach to design a digitally programmable low pass filter (LPF) and variable gain amplifier (VGA) intended for a software-defined radio (SDR) front-end. These flexible analog circuits are driven by a network-on-chip (NoC) that is able to set performance parameters like cut-off frequency, selectivity, noise, and gain guaranteeing at any time a near-optimal power/perfomance trade-off. A design approach is proposed to tackle the challenges imposed by flexibility in analog design. A silicon prototype is realized in 0.13-mu m CMOS technology with 1.2-V supply voltage to prove the validity of the proposed solution. The LPF provides a frequency tuning range between 0.35 MHz and 23.5 MHz with an adaptive integrated noise level between 85 mu Vrms and 163 mu Vrms whereby the power consumption conveniently varies from 0.72 mW to 21.6 mW according to the required performance. The VGA is made up of two cascaded gain stages and provides a gain range from about 0 dB to 39 dB with a reconfigurable power/bandwidth.
Si
Articolo in rivista - Articolo scientifico
Scientifica
Active-G(m)-RC; CMOS analog integrated circuits; continuous-time filters; direct conversion; programmable filters; programmable op-amps; Rauch; single amplifier biquadratic cells; software-defined radio; variable gain amplifier
English
1501
1512
12
Giannini, V., Craninckx, J., D'Amico, S., & Baschirotto, A. (2007). Flexible Baseband Analog Circuits for Software-Defined Radio Front-Ends. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 42(7), 1501-1512 [10.1109/JSSC.2007.899103].
Giannini, V; Craninckx, J; D'Amico, S; Baschirotto, A
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/10281/3822
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