Power consumption is a key point in the design of high-speed switched capacitor (SC) circuits, which efficiently implement a number of analog functions. Among them, SC ΣΔ modulators are very popular for analog-to-digital conversion. In this kind of circuit, operational amplifiers are the most consuming cells because of their requirements in terms of dc-gain and unity-gain frequency. An operational amplifier with 90 dB dc-gain and a unity-gain frequency of 250 MHz is presented. The large power consumption (18 mW) could make critical its use in commercial applications, in particular for portable devices. However, combining this cell with a fast adaptive biasing circuit, high performance may be achieved with a 40% power consumption reduction. This approach has been used in the design of a sixth-order bandpass ΣΔ modulator suitable for the conversion at intermediate frequency (10.7 MHz) of the FM radio signal. A comparison with a structure without the proposed solution demonstrates that the modulator performance are not degraded by the proposed technique.

Cusinato, P., Stefani, F., Baschirotto, A. (2001). Reducing the power consumption in high-speed Sigma Delta bandpass modulators. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 2, ANALOG AND DIGITAL SIGNAL PROCESSING, 48(10), 952-960 [10.1109/82.974784].

Reducing the power consumption in high-speed Sigma Delta bandpass modulators

BASCHIROTTO, ANDREA
2001

Abstract

Power consumption is a key point in the design of high-speed switched capacitor (SC) circuits, which efficiently implement a number of analog functions. Among them, SC ΣΔ modulators are very popular for analog-to-digital conversion. In this kind of circuit, operational amplifiers are the most consuming cells because of their requirements in terms of dc-gain and unity-gain frequency. An operational amplifier with 90 dB dc-gain and a unity-gain frequency of 250 MHz is presented. The large power consumption (18 mW) could make critical its use in commercial applications, in particular for portable devices. However, combining this cell with a fast adaptive biasing circuit, high performance may be achieved with a 40% power consumption reduction. This approach has been used in the design of a sixth-order bandpass ΣΔ modulator suitable for the conversion at intermediate frequency (10.7 MHz) of the FM radio signal. A comparison with a structure without the proposed solution demonstrates that the modulator performance are not degraded by the proposed technique.
Articolo in rivista - Articolo scientifico
FM radio signal; SC integrator; digital radio; fast adaptive biasing circuit; high-speed switched capacitor circuits; limited amplifier bandwidth; operational amplifiers; reduced power consumption; sigma-delta bandpass modulators; sixth-order bandpass modulator; CMOS integrated circuits; digital radio; high-speed integrated circuits; low-power electronics; modulators; operational amplifiers; power consumption; radio receivers; sigma-delta modulation; switched capacitor networks;
English
2001
48
10
952
960
none
Cusinato, P., Stefani, F., Baschirotto, A. (2001). Reducing the power consumption in high-speed Sigma Delta bandpass modulators. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 2, ANALOG AND DIGITAL SIGNAL PROCESSING, 48(10), 952-960 [10.1109/82.974784].
File in questo prodotto:
Non ci sono file associati a questo prodotto.

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/37222
Citazioni
  • Scopus 11
  • ???jsp.display-item.citation.isi??? 11
Social impact