This paper presents a digital amplitude modulator (DAM) for polar transmitter in 90 nm CMOS technology. It consists of 255 basic cells digitally activated by an 8-bit amplitude code to shape a non-constant envelope RF output. To reduce the aliases due to the discrete-time to continuous-time conversion a 2-fold interpolation has been implemented. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achieving -26.1 dB error vector magnitudes (EVM) and 18% drain efficiency. The 8-bit are segmented addressed. This results in a very compact 0.007 mm(2) chip area
Chironi, V., Debaillie, B., Baschirotto, A., Craninckx, J., Ingels, M. (2010). An Area Efficient Digital Amplitude Modulator in 90nm CMOS. In 2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (pp.2219-2222). IEEE [10.1109/ISCAS.2010.5537206].
An Area Efficient Digital Amplitude Modulator in 90nm CMOS
BASCHIROTTO, ANDREA;
2010
Abstract
This paper presents a digital amplitude modulator (DAM) for polar transmitter in 90 nm CMOS technology. It consists of 255 basic cells digitally activated by an 8-bit amplitude code to shape a non-constant envelope RF output. To reduce the aliases due to the discrete-time to continuous-time conversion a 2-fold interpolation has been implemented. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achieving -26.1 dB error vector magnitudes (EVM) and 18% drain efficiency. The 8-bit are segmented addressed. This results in a very compact 0.007 mm(2) chip areaI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.