This paper describes design considerations and the implementation of a software defined radio receiver encompassing intermediate frequency (IF) digitization. The proposed system-on-chip performs the demodulation of both AM and FM stereo signals, digitized at the IF by means of a high dynamic range sigma-delta bandpass A/D converter. The chosen architecture combines hardware and software functions, trading flexible programmability with area occupancy. The software includes also true blind equalization of the FM signals resulting in the rejection of the neighbor channels and of any. other interfering signal, even under severe multipath conditions. The described chip, realized in a 0.18-mum CMOS technology, occupies an area of 15.2 mm(2) and is enclosed in a 64-pin package
Sala, M., Salidu, F., Stefani, F., Kutschenreiter, C., Baschirotto, A. (2004). Design Considerations and Implementation of a DSP-based Car-Radio IF Processor. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 39(7), 1110-1118 [10.1109/JSSC.2004.829402].
Design Considerations and Implementation of a DSP-based Car-Radio IF Processor
Baschirotto, A
2004
Abstract
This paper describes design considerations and the implementation of a software defined radio receiver encompassing intermediate frequency (IF) digitization. The proposed system-on-chip performs the demodulation of both AM and FM stereo signals, digitized at the IF by means of a high dynamic range sigma-delta bandpass A/D converter. The chosen architecture combines hardware and software functions, trading flexible programmability with area occupancy. The software includes also true blind equalization of the FM signals resulting in the rejection of the neighbor channels and of any. other interfering signal, even under severe multipath conditions. The described chip, realized in a 0.18-mum CMOS technology, occupies an area of 15.2 mm(2) and is enclosed in a 64-pin package
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