A new circuit topology for a low-voltage low-power class AB amplifier is presented. The circuit uses adaptive bias to have a better efficiency in driving high capacitive loads. Indeed, being the amplifier bias current dependent on the applied input signal, its slew rate strongly improves so enabling the op-amp to deal with large input signals. Differently than the typical adaptive biased amplifier, we introduce a positive feedback at the input stage to enhance the op-amp DC-Gain up to 90dB. The circuit has been designed in a 0.5μm CMOS technology. Simulation results are shown. The circuit presents a quiescent supply current of only 10μA. It is able to settle in 1μs With 0.1% of error for a 0.4V input voltage step and 10pF of load capacitance
Dalena, F., Giannini, V., Baschirotto, A. (2006). A Low-Power adaptive biasing CMOS Operational Amplifier with enhanced DC-Gain. In PRIME 2006: 2ND CONFERENCE ON PH.D. RESEARCH IN MICROELECTRONIC AND ELECTRONICS, PROCEEDINGS (pp.165-168). 345 E 47TH ST, NEW YORK, NY 10017 USA : IEEE [10.1109/RME.2006.1689922].
A Low-Power adaptive biasing CMOS Operational Amplifier with enhanced DC-Gain
BASCHIROTTO, ANDREA
2006
Abstract
A new circuit topology for a low-voltage low-power class AB amplifier is presented. The circuit uses adaptive bias to have a better efficiency in driving high capacitive loads. Indeed, being the amplifier bias current dependent on the applied input signal, its slew rate strongly improves so enabling the op-amp to deal with large input signals. Differently than the typical adaptive biased amplifier, we introduce a positive feedback at the input stage to enhance the op-amp DC-Gain up to 90dB. The circuit has been designed in a 0.5μm CMOS technology. Simulation results are shown. The circuit presents a quiescent supply current of only 10μA. It is able to settle in 1μs With 0.1% of error for a 0.4V input voltage step and 10pF of load capacitance
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