A 3.3 V CMOS line-driver is presented. The circuit is designed to be used in a serial bus system. The circuit drives a signal in the 1 MHz-16 MHz range on a 75Ω load with amplitude up to 2 Vpp. The proposed line driver achieves a -3 dB bandwidth of about 150 MHz and performs a THD better than 40 dB for a 16 MHz 2 Vpp sinewave. The circuit is designed in a standard 3.3 V 0.35 μm technology. It consumes about 7.5 mW and it occupies a die area of 0.02 mm2.
Baschirotto, A., Frattini, G. (2000). A 3.3 V CMOS line-driver for serial bus. In The 2000 IEEE International Symposium on Circuits and Systems. Proceedings. ISCAS 2000 Geneva (pp.V-457-V-460). Piscataway : IEEE [10.1109/ISCAS.2000.858787].
A 3.3 V CMOS line-driver for serial bus
BASCHIROTTO, ANDREA;
2000
Abstract
A 3.3 V CMOS line-driver is presented. The circuit is designed to be used in a serial bus system. The circuit drives a signal in the 1 MHz-16 MHz range on a 75Ω load with amplitude up to 2 Vpp. The proposed line driver achieves a -3 dB bandwidth of about 150 MHz and performs a THD better than 40 dB for a 16 MHz 2 Vpp sinewave. The circuit is designed in a standard 3.3 V 0.35 μm technology. It consumes about 7.5 mW and it occupies a die area of 0.02 mm2.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.