In this paper we present the design trade-offs for dimensioning the baseband blocks (DAC and reconstruction filter) of a direct conversion transmitter for the UMTS standard. A Matlab model performs a time domain analysis to evaluate the impact of each baseband block non-ideality on the overall transmitter performance. The proposed approach has been used to design a 0.13 μm CMOS test-chip implementing the DAC + filter blocks.

Ghittori, N., Vigna, A., Malcovati, P., D'Amico, S., Baschirotto, A. (2005). Behavioral analysis and dimensioning of UMTS transmitters baseband blocks. In Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on (pp.388-391). IEEE [10.1109/ISCAS.2005.1464606].

Behavioral analysis and dimensioning of UMTS transmitters baseband blocks

Baschirotto, A
2005

Abstract

In this paper we present the design trade-offs for dimensioning the baseband blocks (DAC and reconstruction filter) of a direct conversion transmitter for the UMTS standard. A Matlab model performs a time domain analysis to evaluate the impact of each baseband block non-ideality on the overall transmitter performance. The proposed approach has been used to design a 0.13 μm CMOS test-chip implementing the DAC + filter blocks.
paper
0.13 micron; CMOS test-chip; DAC; UMTS transmitter baseband blocks; design trade-offs; direct conversion transmitter; reconstruction filter; time domain analysis; 3G mobile communication; CMOS analogue integrated circuits; circuit analysis computing; digital-analogue conversion; filters; integrated circuit design; integrated circuit modelling; radio transmitters; semiconductor device models; signal reconstruction; time-domain analysis
English
IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - 23 May 2005 through 26 May 2005
2005
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
0780388348
2005
1
6
388
391
1464606
none
Ghittori, N., Vigna, A., Malcovati, P., D'Amico, S., Baschirotto, A. (2005). Behavioral analysis and dimensioning of UMTS transmitters baseband blocks. In Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on (pp.388-391). IEEE [10.1109/ISCAS.2005.1464606].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/36644
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