A 4th order low-pass continuous-time filter for a UMTS/WLAN receiver of a reconfigurable terminal is presented. The filter uses two Active-gm-RC biquad cells, where a single opamp is used for two poles and its unity-gain-bandwidth is comparable to the filter cut-off frequency. Thus, the opamp power consumption is strongly reduced wrt other closed-loop filter configuration. The cut-off frequency deviation due to the technological spread, aging and temperature variation is adjusted by an on-chip tuning circuit. The device in a 0.13 μm CMOS technology occupies a 0.9mm 2 area and consumes 3.4mW and 14.2mW for the UMTS and WLAN, respectively. The full chip has been designed using an automatic design tool and the experimental results agree with the expected performance.

D'Amico, S., Giannini, V., & Baschirotto, A. (2005). A 1.2V-21dBm OIP3 4^th -order active-g_m -RC reconfigurable (UMTS/WLAN) filter with on-chip tuning designed with an automatic tool. In Proceedings of ESSCIRC 2005: 31st European Solid-State Circuits Conference (pp.315-318). 345 E 47TH ST, NEW YORK, NY 10017 USA : IEEE [10.1109/ESSCIR.2005.1541623].

A 1.2V-21dBm OIP3 4^th -order active-g_m -RC reconfigurable (UMTS/WLAN) filter with on-chip tuning designed with an automatic tool

BASCHIROTTO, ANDREA
2005

Abstract

A 4th order low-pass continuous-time filter for a UMTS/WLAN receiver of a reconfigurable terminal is presented. The filter uses two Active-gm-RC biquad cells, where a single opamp is used for two poles and its unity-gain-bandwidth is comparable to the filter cut-off frequency. Thus, the opamp power consumption is strongly reduced wrt other closed-loop filter configuration. The cut-off frequency deviation due to the technological spread, aging and temperature variation is adjusted by an on-chip tuning circuit. The device in a 0.13 μm CMOS technology occupies a 0.9mm 2 area and consumes 3.4mW and 14.2mW for the UMTS and WLAN, respectively. The full chip has been designed using an automatic design tool and the experimental results agree with the expected performance.
No
paper
Scientifica
0.13 micron; 1.2 V; 14.2 mW; 3.4 mW; CMOS technology; UMTS/WLAN receiver; active-RC biquad cells; automatic design tool; closed-loop filter configuration; continuous-time filter; cut-off frequency deviation; fourth order low-pass filter; on-chip tuning circuit; opamp power consumption; unity-gain-bandwidth; 3G mobile communication; CMOS integrated circuits; RC circuits; biquadratic filters; circuit tuning; continuous time filters; low-pass filters; operational amplifiers; radio receivers; wireless LAN
English
ESSCIRC 2005: 31st European Solid-State Circuits Conference -12 September 2005 through 16 September 2005
9780780392052
D'Amico, S., Giannini, V., & Baschirotto, A. (2005). A 1.2V-21dBm OIP3 4^th -order active-g_m -RC reconfigurable (UMTS/WLAN) filter with on-chip tuning designed with an automatic tool. In Proceedings of ESSCIRC 2005: 31st European Solid-State Circuits Conference (pp.315-318). 345 E 47TH ST, NEW YORK, NY 10017 USA : IEEE [10.1109/ESSCIR.2005.1541623].
D'Amico, S; Giannini, V; Baschirotto, A
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/10281/36638
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