A Track&Hold circuit to be used in front of a highspeed analog-to-digital converter (ADC) is proposed. In order to achieve the required resolution with a single 3-V supply, a fully differential closed-loop architecture is used. The Track&Hold circuit processes a differential 1-Vpp output signal swing and achieves more than 8-b linearity with sampling frequency up to 150 MHz. In these conditions, the total power consumption is 5.4 mW from a single 3-V supply. The circuit has been realized in a 0.7-μm BiCMOS technology, and its active area is about 0.15 mm2.
Schillaci, L., Baschirotto, A., Castello, R. (1997). A 3-V 5.4-mW BiCMOS track&hold circuit with sampling frequency up to 150 MHz. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 32(7), 926-932 [10.1109/4.597282].
A 3-V 5.4-mW BiCMOS track&hold circuit with sampling frequency up to 150 MHz
BASCHIROTTO, ANDREA;
1997
Abstract
A Track&Hold circuit to be used in front of a highspeed analog-to-digital converter (ADC) is proposed. In order to achieve the required resolution with a single 3-V supply, a fully differential closed-loop architecture is used. The Track&Hold circuit processes a differential 1-Vpp output signal swing and achieves more than 8-b linearity with sampling frequency up to 150 MHz. In these conditions, the total power consumption is 5.4 mW from a single 3-V supply. The circuit has been realized in a 0.7-μm BiCMOS technology, and its active area is about 0.15 mm2.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.