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We briefly describe the APE processor, a parallel computer currently used in lattice gauge simulations. We also present in greater details the architecture and the implementation of APE-100, a fine grained SIMD processors for lattice gauge theory simulations, similar in structure to APE and designed to provide floating-point performance in the 100 Gflops range. © 1989.

Avico, N., Bacilieri, P., Cabasino, S., Cabibbo, N., Fernández, L., Fiorentini, G., et al. (1989). From APE to APE-100: From 1 to 100 gflops in lattice gauge theory simulations. COMPUTER PHYSICS COMMUNICATIONS, 57(1-3), 285-289 [10.1016/0010-4655(89)90229-4].

From APE to APE-100: From 1 to 100 gflops in lattice gauge theory simulations

RAPUANO, FEDERICO;
1989

Abstract

We briefly describe the APE processor, a parallel computer currently used in lattice gauge simulations. We also present in greater details the architecture and the implementation of APE-100, a fine grained SIMD processors for lattice gauge theory simulations, similar in structure to APE and designed to provide floating-point performance in the 100 Gflops range. © 1989.
Articolo in rivista - Articolo scientifico
High performance computing; Lattice QCD
English
1989
57
1-3
285
289
none
Avico, N., Bacilieri, P., Cabasino, S., Cabibbo, N., Fernández, L., Fiorentini, G., et al. (1989). From APE to APE-100: From 1 to 100 gflops in lattice gauge theory simulations. COMPUTER PHYSICS COMMUNICATIONS, 57(1-3), 285-289 [10.1016/0010-4655(89)90229-4].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/31344
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