A 3.3 V bandpass ΣΔ modulator for IF sampling at 10.7MHz to be used in radio application has been developed. The modulator presents a 6th-order single-loop architecture and features a 78dB DR with a 200kHz signal bandwidth (FM signal), while for a 9kHz signal bandwidth (AM signal) the DR raises to 93dB. The modulator has been implemented in a standard 0.35μm CMOS technology using SC technique and consumes 80mW from a single 3.3V supply. © 1999 Editions Frontieres.
Tonietto, D., Cusinato, P., Stefani, F., Baschirotto, A. (1999). A 3.3V CMOS 10.7MHz 6th-order bandpass ΣΔ modulator with 78dB dynamic range. In Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European (pp.78-81). IEEE.
A 3.3V CMOS 10.7MHz 6th-order bandpass ΣΔ modulator with 78dB dynamic range
BASCHIROTTO, ANDREA
1999
Abstract
A 3.3 V bandpass ΣΔ modulator for IF sampling at 10.7MHz to be used in radio application has been developed. The modulator presents a 6th-order single-loop architecture and features a 78dB DR with a 200kHz signal bandwidth (FM signal), while for a 9kHz signal bandwidth (AM signal) the DR raises to 93dB. The modulator has been implemented in a standard 0.35μm CMOS technology using SC technique and consumes 80mW from a single 3.3V supply. © 1999 Editions Frontieres.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.