Atomic defects in high-k materials affect the performance, reliability, variability, and scaling potential of electronic devices. Their characterization is thus of paramount importance, and methods exploiting electrical measurements are highly demanded. In this work we present a novel method for extracting the defect properties from I-V curve hysteresis measured at low electric field in thick metal-insulator-metal (MIM) stacks. The I-V curve hysteresis allows detecting the defects located near the electrode-insulator interfaces and aligned with the stack Fermi level, and extracting their properties. The defects are profiled cross-correlating the information provided by the low-field current hysteresis and the high-field steady-state current. This technique can be applied to MIM stacks fabricated in Back-End-of-Line for capacitors, embedded memories and thin film transistors.

La Torraca, P., Caruso, F., Padovani, A., Spiga, S., Tallarida, G., & Larcher, L. (2021). Extraction of Defects Properties in Dielectric Materials From I-V Curve Hysteresis. IEEE ELECTRON DEVICE LETTERS, 42(2 (Feb. 2021)), 220-223 [10.1109/LED.2020.3048079].

Extraction of Defects Properties in Dielectric Materials From I-V Curve Hysteresis

Caruso F.
Secondo
;
2021

Abstract

Atomic defects in high-k materials affect the performance, reliability, variability, and scaling potential of electronic devices. Their characterization is thus of paramount importance, and methods exploiting electrical measurements are highly demanded. In this work we present a novel method for extracting the defect properties from I-V curve hysteresis measured at low electric field in thick metal-insulator-metal (MIM) stacks. The I-V curve hysteresis allows detecting the defects located near the electrode-insulator interfaces and aligned with the stack Fermi level, and extracting their properties. The defects are profiled cross-correlating the information provided by the low-field current hysteresis and the high-field steady-state current. This technique can be applied to MIM stacks fabricated in Back-End-of-Line for capacitors, embedded memories and thin film transistors.
Articolo in rivista - Articolo scientifico
Atomic defects; charge trapping; defects characterization; high-k dielectric; metal-insulator-metal stack;
English
220
223
4
La Torraca, P., Caruso, F., Padovani, A., Spiga, S., Tallarida, G., & Larcher, L. (2021). Extraction of Defects Properties in Dielectric Materials From I-V Curve Hysteresis. IEEE ELECTRON DEVICE LETTERS, 42(2 (Feb. 2021)), 220-223 [10.1109/LED.2020.3048079].
La Torraca, P; Caruso, F; Padovani, A; Spiga, S; Tallarida, G; Larcher, L
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/300575
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