Nowadays, most of the motor driving systems are still using IGBTs as power switches. Moreover, also for this kind of applications, energy saving is of the utmost importance. IGBTs driving solutions are traditionally implemented using a fixed output current for charging and discharging the switch's gate. This solution, however, does not take into account Miller Capacitance (Crss) non-linearity effects in recent device generation. As Crss value spreads at least of one order of magnitude over the collector-to-emitter voltage (VCE) swing, the fixed current produces two different dV/dt, causing additional switching losses. In order to reduce them, a two-step gate driver is proposed in this paper. The presented solution has been firstly validated on a discrete concept board, then implemented in an integrated circuit developed in a 1 μm High-Voltage (HV) SOI technology. Simulation and bench results are presented, highlighting the advantages of this solution and defining future improvements.
Mandelli, E., Mariconti, A., Ruzza, S., Baschirotto, A. (2019). Active dual level gate driver for switching losses reduction in IGBTs. In 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019 (pp.334-337). Institute of Electrical and Electronics Engineers Inc. [10.1109/ICECS46596.2019.8965118].
Active dual level gate driver for switching losses reduction in IGBTs
Mandelli E.;Baschirotto A.
2019
Abstract
Nowadays, most of the motor driving systems are still using IGBTs as power switches. Moreover, also for this kind of applications, energy saving is of the utmost importance. IGBTs driving solutions are traditionally implemented using a fixed output current for charging and discharging the switch's gate. This solution, however, does not take into account Miller Capacitance (Crss) non-linearity effects in recent device generation. As Crss value spreads at least of one order of magnitude over the collector-to-emitter voltage (VCE) swing, the fixed current produces two different dV/dt, causing additional switching losses. In order to reduce them, a two-step gate driver is proposed in this paper. The presented solution has been firstly validated on a discrete concept board, then implemented in an integrated circuit developed in a 1 μm High-Voltage (HV) SOI technology. Simulation and bench results are presented, highlighting the advantages of this solution and defining future improvements.
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