This paper presents a buck type DC-DC converter based on an asynchronous pulse width modulator (APWM). The proposed APWM is a self-oscillating circuitry which is composed of a binary comparator (BAPWM) and a distinctive digitally controlled delay cell. The oscillating frequency of the BAPWM can be tuned by the delay of the modulator loop. By increasing the delay of the modulator loop, the switching frequency decreases and the BAPWM can be reconfigured as a low frequency APWM (LFAPWM) modulator to meet the efficiency requirement at light loads. Also, to save the switching power consumption the high-side power switch size is scaled according to the load conditions. Since the carrier signal is internally generated by the APWM itself, there is no major concern about the ramp signal discontinuity which is make duty cycle disturbance. In addition to, from the point of view of the output spectrum, the proposed converter provides a better performance compared to the conventional PWM (CPWM) and PFM due to its noise shaping property. The proposed converter is designed and simulated in a 0.13-µm CMOS technology to convert an input voltage of 5 V to the output voltage of 2.5 V with the maximum load current of 1 A. The conversion efficiency with full loading range for the 2.5 V output voltage is higher than 85% whereas the peak efficiency is about 92%.

Inanlou, R., Shokri, R., Shoaei, O., Baschirotto, A. (2020). A buck converter based on dual mode asynchronous pulse width modulator. AEÜ. INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 114 [10.1016/j.aeue.2019.152998].

A buck converter based on dual mode asynchronous pulse width modulator

Baschirotto A.
2020

Abstract

This paper presents a buck type DC-DC converter based on an asynchronous pulse width modulator (APWM). The proposed APWM is a self-oscillating circuitry which is composed of a binary comparator (BAPWM) and a distinctive digitally controlled delay cell. The oscillating frequency of the BAPWM can be tuned by the delay of the modulator loop. By increasing the delay of the modulator loop, the switching frequency decreases and the BAPWM can be reconfigured as a low frequency APWM (LFAPWM) modulator to meet the efficiency requirement at light loads. Also, to save the switching power consumption the high-side power switch size is scaled according to the load conditions. Since the carrier signal is internally generated by the APWM itself, there is no major concern about the ramp signal discontinuity which is make duty cycle disturbance. In addition to, from the point of view of the output spectrum, the proposed converter provides a better performance compared to the conventional PWM (CPWM) and PFM due to its noise shaping property. The proposed converter is designed and simulated in a 0.13-µm CMOS technology to convert an input voltage of 5 V to the output voltage of 2.5 V with the maximum load current of 1 A. The conversion efficiency with full loading range for the 2.5 V output voltage is higher than 85% whereas the peak efficiency is about 92%.
Articolo in rivista - Articolo scientifico
Asynchronous pulse width modulation; Buck converter; CMOS technology; Dual mode operation; Hysteretic comparator;
Asynchronous pulse width modulation; Buck converter; CMOS technology; Dual mode operation; Hysteretic comparator
English
2020
114
152998
none
Inanlou, R., Shokri, R., Shoaei, O., Baschirotto, A. (2020). A buck converter based on dual mode asynchronous pulse width modulator. AEÜ. INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 114 [10.1016/j.aeue.2019.152998].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/290358
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