A dV/dt self-adjusting architecture for driving new generations of power transistors is presented. Superjunction technology provided a real opportunity to significantly improve the overall performance/cost ratio of power conversion. However, due to the fast commutation speed capability of Superjunction devices, its switching characteristics are more susceptible to parasitic elements, such as the non-linear gate-drain capacitance. This element affects the slope, dV/dt, which must be a trade-off between switching loss reduction and electromagnetic interference compatibility specifications. A new driving strategy for hard-switching inverters stages is proposed, in order to make the whole system working in the optimum self-adjusting operating point.

Morini, S., Respigo, D., Arosio, M. (2019). Challenges in Driving New Generations of Power Switches for Motor Drive: A dV/dt Self-Adjusting Architecture for Superjunction Power Devices. In Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits (pp. 193-211). Springer [10.1007/978-3-030-25267-0_12].

Challenges in Driving New Generations of Power Switches for Motor Drive: A dV/dt Self-Adjusting Architecture for Superjunction Power Devices

Arosio, Martina
2019

Abstract

A dV/dt self-adjusting architecture for driving new generations of power transistors is presented. Superjunction technology provided a real opportunity to significantly improve the overall performance/cost ratio of power conversion. However, due to the fast commutation speed capability of Superjunction devices, its switching characteristics are more susceptible to parasitic elements, such as the non-linear gate-drain capacitance. This element affects the slope, dV/dt, which must be a trade-off between switching loss reduction and electromagnetic interference compatibility specifications. A new driving strategy for hard-switching inverters stages is proposed, in order to make the whole system working in the optimum self-adjusting operating point.
Capitolo o saggio
Superjunction, dV/dt, Hard-switching, Gate drivers, Motor drive
English
Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits
2019
978-3-030-25266-3
Springer
193
211
Morini, S., Respigo, D., Arosio, M. (2019). Challenges in Driving New Generations of Power Switches for Motor Drive: A dV/dt Self-Adjusting Architecture for Superjunction Power Devices. In Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits (pp. 193-211). Springer [10.1007/978-3-030-25267-0_12].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/276118
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