The aim of this work is to investigate the spatial structure of defectivity in integrated circuits fabrication. A prompt detection of an excess of defects and their spatial structure is critical for the entire fabrication process in order to limit yield loss. We propose first a control chart for spatial defectivity on the wafer area based on p-value. Then, a clustering procedure based on the minimum spanning tree algorithm is suggested to identify the areas of the wafer more prone to high defectivity and display their shape effectively.

Borgoni, R., Galimberti, C., Zappa, D. (2020). Identifying and representing clusters of spatial defects in microelectronics planar artefacts. In PROCEEDINGS-WORKSHOP-2020.

Identifying and representing clusters of spatial defects in microelectronics planar artefacts

Borgoni, R;Galimberti, C;
2020

Abstract

The aim of this work is to investigate the spatial structure of defectivity in integrated circuits fabrication. A prompt detection of an excess of defects and their spatial structure is critical for the entire fabrication process in order to limit yield loss. We propose first a control chart for spatial defectivity on the wafer area based on p-value. Then, a clustering procedure based on the minimum spanning tree algorithm is suggested to identify the areas of the wafer more prone to high defectivity and display their shape effectively.
abstract + poster
CSR, p-value control chart, Monte Carlo test
English
Statistics and Innovation for Industry 4.0
2020
PROCEEDINGS-WORKSHOP-2020
2020
open
Borgoni, R., Galimberti, C., Zappa, D. (2020). Identifying and representing clusters of spatial defects in microelectronics planar artefacts. In PROCEEDINGS-WORKSHOP-2020.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/263067
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