This study presents a novel low-pass continuous-time filter based on the voltage flipped-source-follower (SF). The filter efficiently operates in CMOS 28 nm and improves the SF filters state-of-the-art thanks to a dedicated circuit that operates in fully-differential fashion (instead of the pseudo-differential typically used in state-of-the-art SF filters) with a dedicated Common-Mode-Feedback circuit. Thus this work extends the application of the SF filtering stages to the nm-range technologies where threshold voltage (VTH) is only two times lower than the supply voltage (VDD) for what regards standard-process MOS transistors. In order to validate the design concept, the proposed filter has been designed in CMOS 28 nm technology. Extensive simulation results of a 131 MHz -3 dB frequency proof-of-concept second-order filter are proposed. The device consumes 510 μW power from a single 1 V supply-voltage. In-band integrated noise is 160 μVRMS and IIP3 is 19 dBm for 20 and 21 MHz input tones frequencies. Simulation results lead to 166 J-1 figure-of-merit, outperforming the analogue filter stateof- the-art.

De Matteis, M., Mangiagalli, L., Baschirotto, A. (2018). Fully-differential flipped-source-follower lowpass analogue filter in CMOS 28 nm bulk. IET CIRCUITS, DEVICES & SYSTEMS, 12(6), 689-695 [10.1049/iet-cds.2018.5151].

Fully-differential flipped-source-follower lowpass analogue filter in CMOS 28 nm bulk

De Matteis, Marcello
;
Mangiagalli, Luca;Baschirotto, Andrea
2018

Abstract

This study presents a novel low-pass continuous-time filter based on the voltage flipped-source-follower (SF). The filter efficiently operates in CMOS 28 nm and improves the SF filters state-of-the-art thanks to a dedicated circuit that operates in fully-differential fashion (instead of the pseudo-differential typically used in state-of-the-art SF filters) with a dedicated Common-Mode-Feedback circuit. Thus this work extends the application of the SF filtering stages to the nm-range technologies where threshold voltage (VTH) is only two times lower than the supply voltage (VDD) for what regards standard-process MOS transistors. In order to validate the design concept, the proposed filter has been designed in CMOS 28 nm technology. Extensive simulation results of a 131 MHz -3 dB frequency proof-of-concept second-order filter are proposed. The device consumes 510 μW power from a single 1 V supply-voltage. In-band integrated noise is 160 μVRMS and IIP3 is 19 dBm for 20 and 21 MHz input tones frequencies. Simulation results lead to 166 J-1 figure-of-merit, outperforming the analogue filter stateof- the-art.
Articolo in rivista - Articolo scientifico
Control and Systems Engineering; Electrical and Electronic Engineering
English
689
695
7
De Matteis, M., Mangiagalli, L., Baschirotto, A. (2018). Fully-differential flipped-source-follower lowpass analogue filter in CMOS 28 nm bulk. IET CIRCUITS, DEVICES & SYSTEMS, 12(6), 689-695 [10.1049/iet-cds.2018.5151].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/220136
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