This paper presents a multidisciplinary experiment where a population of neurons, dissociated from rat hippocampi, has been cultivated over a CMOS-based micro-electrode array (MEA) and its electrical activity has been detected and mapped by an advanced spike-sorting algorithm implemented on FPGA. MEAs are characterized by low signal-to-noise ratios caused by both the contactless sensing of weak extracellular voltages and the high noise power coming from cells and analog electronics signal processing. This low SNR forces to utilize advanced noise rejection algorithms to separate relevant neural activity from noise, which are usually implemented via software/off-line. However, off-line detection of neural spikes cannot be obviously used for real-time electrical stimulation. In this scenario, this paper presents a proper FPGA-based system capable to detect in real-time neural spikes from background noise. The output signals of the proposed system provide real-time spatial and temporal information about the culture electrical activity and the noise power distribution with a minimum latency of 165 ns. The output bit-stream can be further utilized to detect synchronous activity within the neural network.

Vallicelli, E., Reato, M., Maschietto, M., Vassanelli, S., Guarrera, D., Rocchi, F., et al. (2018). Neural spike digital detector on FPGA. ELECTRONICS, 7(12) [10.3390/electronics7120392].

Neural spike digital detector on FPGA

Vallicelli, Elia Arturo
;
Baschirotto, Andrea;De Matteis, Marcello
2018

Abstract

This paper presents a multidisciplinary experiment where a population of neurons, dissociated from rat hippocampi, has been cultivated over a CMOS-based micro-electrode array (MEA) and its electrical activity has been detected and mapped by an advanced spike-sorting algorithm implemented on FPGA. MEAs are characterized by low signal-to-noise ratios caused by both the contactless sensing of weak extracellular voltages and the high noise power coming from cells and analog electronics signal processing. This low SNR forces to utilize advanced noise rejection algorithms to separate relevant neural activity from noise, which are usually implemented via software/off-line. However, off-line detection of neural spikes cannot be obviously used for real-time electrical stimulation. In this scenario, this paper presents a proper FPGA-based system capable to detect in real-time neural spikes from background noise. The output signals of the proposed system provide real-time spatial and temporal information about the culture electrical activity and the noise power distribution with a minimum latency of 165 ns. The output bit-stream can be further utilized to detect synchronous activity within the neural network.
Articolo in rivista - Articolo scientifico
Biological neural networks; Biosensors; Digital circuits; Field programmable gate arrays; Neural engineering; Principal component analysis; Control and Systems Engineering; Signal Processing; Hardware and Architecture; Computer Networks and Communications; Electrical and Electronic Engineering
English
Vallicelli, E., Reato, M., Maschietto, M., Vassanelli, S., Guarrera, D., Rocchi, F., et al. (2018). Neural spike digital detector on FPGA. ELECTRONICS, 7(12) [10.3390/electronics7120392].
Vallicelli, E; Reato, M; Maschietto, M; Vassanelli, S; Guarrera, D; Rocchi, F; Collazuol, G; Zeitler, R; Baschirotto, A; De Matteis, M
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/220132
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