This paper presents the result of a multidisciplinary experiment where electrical activity from a cultured rat hippocampi neuronal population is detected in real time by a FPGA implemented digital circuit. State-of-the-art EOMOSFET Multi Electrode Array (MEA) biosensors exploits a capacitive coupling between the biological environment and the sensing electronics to minimize invasiveness and cell damage, at the price of a lower SNR. For this reason, they are typically improved by noise rejection algorithms. Real time neural spikes detection opens unthinkable scenarios, allowing to stimulate single neurons in response to their behavior, possibly improving medical conditions like epilepsy. In this scenario, a spike sorting algorithm has been hardware implemented, allowing real time neural spike detection with a latency of 165ns

Vallicelli, E., Fary, F., Baschirotto, A., De Matteis, M., Reato, M., Maschietto, M., et al. (2018). Real-time digital implementation of a principal component analysis algorithm for neurons spike detection. In ICICDT 2018 - International Conference on IC Design and Technology, Proceedings (pp.33-36). Institute of Electrical and Electronics Engineers Inc. [10.1109/ICICDT.2018.8399749].

Real-time digital implementation of a principal component analysis algorithm for neurons spike detection

Vallicelli, E. A.;Fary, F.;Baschirotto, A.;De Matteis, M.;
2018

Abstract

This paper presents the result of a multidisciplinary experiment where electrical activity from a cultured rat hippocampi neuronal population is detected in real time by a FPGA implemented digital circuit. State-of-the-art EOMOSFET Multi Electrode Array (MEA) biosensors exploits a capacitive coupling between the biological environment and the sensing electronics to minimize invasiveness and cell damage, at the price of a lower SNR. For this reason, they are typically improved by noise rejection algorithms. Real time neural spikes detection opens unthinkable scenarios, allowing to stimulate single neurons in response to their behavior, possibly improving medical conditions like epilepsy. In this scenario, a spike sorting algorithm has been hardware implemented, allowing real time neural spike detection with a latency of 165ns
slide + paper
Biological neural networks; Biosensors; Digital Circuits; Field programmable gate arrays; Principal component analysis; Hardware and Architecture; Electrical and Electronic Engineering; Safety, Risk, Reliability and Quality
English
International Conference on IC Design and Technology, ICICDT 2018 4 June through 6 June
2018
Vallicelli, EA
ICICDT 2018 - International Conference on IC Design and Technology, Proceedings
978-153862549-1
2018
33
36
http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8391403
none
Vallicelli, E., Fary, F., Baschirotto, A., De Matteis, M., Reato, M., Maschietto, M., et al. (2018). Real-time digital implementation of a principal component analysis algorithm for neurons spike detection. In ICICDT 2018 - International Conference on IC Design and Technology, Proceedings (pp.33-36). Institute of Electrical and Electronics Engineers Inc. [10.1109/ICICDT.2018.8399749].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/10281/205507
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