Silicon-on-insulator nanowires as spintronic device for quantum computing: design, processing, fabrication and electrical characterization

In semiconductor industries, the passage from traditional CMOS toward SOI technology has fruitfully helped for eliminating most of the detrimental substrate effects connected with leakage current and parasitic effect present in devices fabricated according to CMOS technology. It can be argued how SOI technology emphasizes the real capabilities of low dimensional systems. Nanowires (NWs) are basilar structures which have two quantum confined directions which, if opportunely scaled down, are expected to give rise to quantistic confinement, while still leaving one unconfined direction for electrical conduction. Such basic structure can then be exploited to get an electrical tool for the readout of phenomena which obeys to quantum physics laws. The spin-state of the paramagnetic centers located inside the n-type doped SOI-NWs can be then thought as a potential candidate for accessing to the Quantum Information Processing. Silicon NWs were fabricated in SOI technology by exploiting a top-down approach, that is the Electron Beam Lithography (EBL). A custom EBL system provided by University of Pisa was used for this purpose. Both the EBL technology and all the needed process steps (thermal treatments, chemical processing, metal patterning, etc.) have been set-up in MDM by the thesis author in order to finalize the fabrication of SOI-NWs. All process steps were integrated for fabricating of devices with three different layouts. The smallest patterning structures were in the range of 50±5nm for wired structures. The structures fabricated for the electrical tests (devices) had trapezoidal section whose typical dimension was below 100 nm. The layouts of these device were designed in order to provide the readout of the spin resonance signal coming out from the paramagnetic centres located both in the bulk and at the Si-SiO2 interfaces of the NWs conductive channel. Current-Voltage measurements were carried on at different temperatures in order to extract the metal-semiconductor junction parameters and to identify the conduction mechanism ruling the carrier motion in different temperature ranges. Electrically Detected Magnetic Resonance (EDMR)measurements were performed at low temperature in order to test, as already mentioned, the capability of such devices for providing the readout of the spin-state. The EDMR test results were quite good: the highest sensitivity reached was of 102 centres. Despite of many efforts have to be carried on in this matter, EDMR has demonstrated to be a suitable technique for getting the readout of donor electron spin state inside SOI-NWs.