This paper presents a low-power, high-performance continuous-time ΣΔ modulator for MEMS microphones front-end. The ΣΔ modulator 3rd-order loop filter has been implemented with a low-noise, power-optimized active-RC architecture that uses only two operational amplifiers. This solution, along with the use of a 15-level quantizer and of a feedback DAC with three-level current-steering elements, which minimizes the noise contribution for small input signals, allows achieving a DR larger than 100 dB, while consuming less than 0.5 mW, as required in always-running audio modules for portable devices. The proposed ΣΔ modulator, realized in 0.16 μm CMOS technology with an area of 0.21 mm2, achieves 106 dB A-weighted DR and 91.3 dB peak SNDR, consuming 390 μW from a 1.6 V power supply.
De Berti, C., Malcovati, P., Crespi, L., Baschirotto, A. (2016). A 106 dB A-Weighted DR Low-Power Continuous-Time ΣΔ Modulator for MEMS Microphones. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 51(7), 1607-1618 [10.1109/JSSC.2016.2540811].
A 106 dB A-Weighted DR Low-Power Continuous-Time ΣΔ Modulator for MEMS Microphones
BASCHIROTTO, ANDREAUltimo
2016
Abstract
This paper presents a low-power, high-performance continuous-time ΣΔ modulator for MEMS microphones front-end. The ΣΔ modulator 3rd-order loop filter has been implemented with a low-noise, power-optimized active-RC architecture that uses only two operational amplifiers. This solution, along with the use of a 15-level quantizer and of a feedback DAC with three-level current-steering elements, which minimizes the noise contribution for small input signals, allows achieving a DR larger than 100 dB, while consuming less than 0.5 mW, as required in always-running audio modules for portable devices. The proposed ΣΔ modulator, realized in 0.16 μm CMOS technology with an area of 0.21 mm2, achieves 106 dB A-weighted DR and 91.3 dB peak SNDR, consuming 390 μW from a 1.6 V power supply.File | Dimensione | Formato | |
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