Neuromorphic computing draws inspiration from the functionality of biological neural systems to achieve efficient, parallel, event-driven and adaptive information processing. This approach is beneficial when latency is critical, data transfer is limited or hardware resources (storage and computing power) reduced, such as in the case of always-on edge devices. In order to implement hardware able to execute spiking neural networks, scaled FinFET technologies nodes are promising as they allow to increase the number of physical computing nodes, the neurons, in the same silicon area. The expected reduction in system-level power consumption is present in fully-digital implementations and in mixed-signal ones, which include digital routing stages to a large extent. This Ph.D. thesis focuses on the implementation of an analog Integrate-And-Fire (INF) Neuron in 7 nm FinFET technology at a power supply voltage of 750 mV. In order to investigate the electrical characteristics of the adopted technology node, the INF neuron features external current references to tune the membrane leak current, refractory period, and interspike intervals and to account for simulation-measurement mismatches after silicon fabrication. Additionally, capacitive arrays were employed for the neuron membrane and positive feedback, allowing a spike generation on an accelerated timescale from units to hundreds of us. The INF neuron was submitted for tapeout and post-layout simulations are reported for different sets of external biases. Finally, electrical parameters were extracted for a specific case and a spiking neural network model simulating the implemented computing node in Python is presented.
Neuromorphic computing draws inspiration from the functionality of biological neural systems to achieve efficient, parallel, event-driven and adaptive information processing. This approach is beneficial when latency is critical, data transfer is limited or hardware resources (storage and computing power) reduced, such as in the case of always-on edge devices. In order to implement hardware able to execute spiking neural networks, scaled FinFET technologies nodes are promising as they allow to increase the number of physical computing nodes, the neurons, in the same silicon area. The expected reduction in system-level power consumption is present in fully-digital implementations and in mixed-signal ones, which include digital routing stages to a large extent. This Ph.D. thesis focuses on the implementation of an analog Integrate-And-Fire (INF) Neuron in 7 nm FinFET technology at a power supply voltage of 750 mV. In order to investigate the electrical characteristics of the adopted technology node, the INF neuron features external current references to tune the membrane leak current, refractory period, and interspike intervals and to account for simulation-measurement mismatches after silicon fabrication. Additionally, capacitive arrays were employed for the neuron membrane and positive feedback, allowing a spike generation on an accelerated timescale from units to hundreds of us. The INF neuron was submitted for tapeout and post-layout simulations are reported for different sets of external biases. Finally, electrical parameters were extracted for a specific case and a spiking neural network model simulating the implemented computing node in Python is presented.
Stevenazzi, L (2026). Integrate-And-Fire Analog Neuron in 7 nm FinFET Technology. (Tesi di dottorato, , 2026).
Integrate-And-Fire Analog Neuron in 7 nm FinFET Technology
STEVENAZZI, LORENZO
2026
Abstract
Neuromorphic computing draws inspiration from the functionality of biological neural systems to achieve efficient, parallel, event-driven and adaptive information processing. This approach is beneficial when latency is critical, data transfer is limited or hardware resources (storage and computing power) reduced, such as in the case of always-on edge devices. In order to implement hardware able to execute spiking neural networks, scaled FinFET technologies nodes are promising as they allow to increase the number of physical computing nodes, the neurons, in the same silicon area. The expected reduction in system-level power consumption is present in fully-digital implementations and in mixed-signal ones, which include digital routing stages to a large extent. This Ph.D. thesis focuses on the implementation of an analog Integrate-And-Fire (INF) Neuron in 7 nm FinFET technology at a power supply voltage of 750 mV. In order to investigate the electrical characteristics of the adopted technology node, the INF neuron features external current references to tune the membrane leak current, refractory period, and interspike intervals and to account for simulation-measurement mismatches after silicon fabrication. Additionally, capacitive arrays were employed for the neuron membrane and positive feedback, allowing a spike generation on an accelerated timescale from units to hundreds of us. The INF neuron was submitted for tapeout and post-layout simulations are reported for different sets of external biases. Finally, electrical parameters were extracted for a specific case and a spiking neural network model simulating the implemented computing node in Python is presented.| File | Dimensione | Formato | |
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phd_unimib_801928.pdf
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Descrizione: Tesi_revisionata _Definitiva
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Doctoral thesis
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