Charge transport in ultrathin silicon-on-insulator films for advanced device applications

The continuous demand for higher performance and lower power consumption, has driven the relentless scaling of microelectronic components. As transistor architectures advance toward the Angstrom era, the introduction of ultrathin silicon (Si) films and nanoscale 3D architectures became essential to achieve better electrostatic control of the channel and improve device performance. At the same time, the slowdown of performance improvement of conventional CMOS has motivated the exploration of new computational paradigms, as unconventional and quantum computing. These trends highlight the need for new material engineering strategies and doping methodologies capable of supporting both continued scaling and novel device functionalities. Doping at the nanoscale remains an unresolved challenge, particularly for Si nanostructures with reduced dimensionality. Silicon-on-insulator (SOI) substrate, with its isolated and controlled device layer, offers exceptional tunability in interface quality, doping concentration (nD), and film thickness (HSOI), making it an ideal platform for investigating and understanding the properties of doped 2D Si nanofilms. The versatility and maturity of SOI platform provide a robust foundation for developing new device strategies that extend beyond CMOS. Conventional doping processes face limitations as Si films approach the 2D regime. The reduced dimensionality strongly affect dopant incorporation and activation making it increasingly difficult to achieve uniform and predictable electrical properties in ultrathin Si nanofilms. Among the proposed strategies, polymeric precision doping (PPD) stands out for its unique potential to achieve precise control, scalability, and compatibility with existing fabrication processes. First, this work investigates the applicability of PPD to achieve predictable doping of ultrathin Si films in a wide range of nD. A set of dedicated processing techniques was developed to provide accurate and tunable independent control over both HSOI and nD, which was varied over two orders of magnitude. Specific test structures were designed and integrated into the fabrication process to enable systematic electrical characterization and quantitative analysis of the properties of the film. This study explores the intricate interplay between different fundamental phenomena induced by dopant confinement, with particular attention to the role of non-passivated interface states at the Si/SiO2 interface and their impact on carrier concentration and mobility. The influence of different capping layers and interface conditions was investigated, as well as the effect of dielectric mismatch between Si and its surroundings. Quantum phenomena at high nD in 2D conduction regime were also explored. Understanding the fundamental properties of the material enables the design of devices with tailored functionalities on the doped SOI platform. Initial results on multi-electrode devices showed tunable transport and negative differential resistance, a key property enabling nonlinear computation. Finally, low T studies on single-electron tunneling demonstrated the feasibility of co-doping to improve functionality via quantum dot arrays, a strategy enhancing stability, reproducibility, and yield, and offering a promising route toward high T operation and ultralow-power electronics. Overall, this work investigates the physical characteristics that drive the structural, electronic, and transport properties in doped ultrathin Si nanofilms and presents device applications developed to take advantage of the doped SOI platform. By bridging the atomistic mecahnisms associated to dopant incoprporaiton and activation with the properties of the material and devices, this fundamental study aims to provide the foundation for empirical models of doping at the nanoscale and for versatile fabrication strategies for the next-generation and beyond-CMOS Si-based technologies.